Microsoft patent dispute

[James Love <love@cptech.org>]

  Item concerning MS patent dispute.  Jamie
  
  -------------
  
  Subject: PATNEWS: Software inventor taking on Microsoft?
       Date: Mon, 22 Dec 1997 16:35:08 -0500
       From: srctran@world.std.com (Gregory Aharonian)
  
  !19971222  Software inventor taking on Microsoft?
  
      Today's Business Week Online (http://www.businessweek.com) has a
  neat
  story on new patents that might be asserted against Microsoft.  The two
  patents, 5,694,603 & 5,694,604, are continuations of a 1982 filings, and
  deal with pre-emptive multitasking.  The inventor is also contacting
  Microsoft's competitors, seeing if they want to buy the patent to assert
  against microsoft.  Interestingly, the inventor is a former IBM patent
  attorney.
  
      Decent patent and non-patent prior art were cited, but not enough -
  only one prior ACM and one prior IEEE article were cited, along with a
  few TDBs, a few SPEs.  Thus my skepticism on the use of the patents as
  weapons.  Here is the beginning of the BWO article, if you want to track
  it down to read the whole thing:
  
       BUSINESS WEEK ONLINE
       December 22, 1997
       
       NOW, MICROSOFT MAY BE FACING A PATENT BATTLE 
       By Steve Hamm in San Mateo, Calif.
       Edited by Douglas Harbrecht
       
       It happens every couple of years in the computer business. An
  inventor 
       seemingly comes out of nowhere to claim the rights to some key
  piece 
       of technology. The latest example: Martin Reiffin, a 73-year-old 
       inventor and former IBM patent attorney who, after a 16-year
  struggle, 
       received two patents earlier this month covering preemptive 
       multitasking -- a method for allowing personal computer software 
       applications to perform more than one task at a time.
  
  
  and the background info on one of the patents:
  
  
     United States Patent 5,694,604
     Dec. 2, 1997
     
     Preemptive multithreading computer system with clock activated
     interrupt 
     
     Inventors: Reiffin; Martin G. (5439 Blackhawk Dr., Danville, CA
  94506).
     Appl. No.: 217,669
     Filed: Mar. 25, 1994
     
                         Related U.S. Application Data
                                        
     Continuation of (including streamline cont.) Ser. No. 496,282, Mar.
     20, 1990, which is a continuation of Ser. No. 425,612, Sept. 28,
  1982,
     abandoned and Ser No. 719,507, Apr. 3, 1985, abandoned.
     
     Intl. Cl. : G06F 9/46
     Current U.S. Cl.: 395/677
     Field of Search: 395/375, 650, 677, 678
       _________________________________________________________________
     
                       References Cited | [Referenced By]
       _________________________________________________________________
     
                                Other References
                                        
            Cheriton, David Ross, "Multi-Process Structuring and the Thoth
            Operating System," Doctorial Thesis, University of Waterloo,
            1978.
            
            Lorin, Harold, "Parallelism in Hardware and Software, Real and
            Apparent Concurrency," Prentice-Hall Inc., 1972, p. 43.
            
            Cheriton et al., "Thoth, a Portable Real-Time Operating
            System," Department of Computer Science, University of
            Waterloo, Mar. 1978.
            
            Hiromoto, Robert, Parallel-processing a large scientific
            problem, AFIPS Press. 1982, pp. 235-237.
            
            Ousterhout, John K., Scheduling techniques for Concurrent
            Systems, IEEE, 1982, pp. 22-30.
            
            Andrews, Gregory R., Synchronizing Resources, ACM Transactions
            on Programming Languages and Systems, vol. 3, No. 4, Oct.
  1981,
            pp. 405-430.
            
            Colin, A.J.T., The Implementation of STAB-1, Software
  -Practice
            and Experience, vol. 2, 1972, pp. 137-142.
            
            Artym, Richard, The STAB Multiprocessing Environment for
            CYBA-M, Software -Practice and Experience, vol. 12, 1982, pp.
            323-329.
            
            Treleaven et al., Combining Data Flow and Control Flow
            Computing, The Computer Journal, vol. 25, No. 2, 1982, pp.
            207-217.
            
            Duffie, C. A. III, Task Scheduling Algorithm for a
            Teleprocessing Communications Controller, IBM Technical
            Disclosure Bulletin, vol. 16, No. 10, Marcy 1974, pp.
            3349-3352.
            
            Hoare, C. A. R., Towards a Theory of Parallel Programming,
            Operating Systems Techniques, Proceedings of a Seminar held at
            Queen's University, Belfast, 1972, Academic Press, 1972, pp.
            61-71.
            
     Primary Examiner: Ellis; Richard L.
       _________________________________________________________________
     
                                    Abstract
       _________________________________________________________________
     
     A multithreading computer system provides concurrent asynchronous
     preemptive time-sliced execution of a plurality of threads of
     instructions located within the same software program. A clock or
     timer periodically activates the interrupt operation of the central
     processor. Each interrupt preempts an executing thread after the
     thread has executed for a brief timeslice during which the thread may
     have performed only a portion of its task. Control of the processor
  is
     thereby taken away from the preempted thread, and control then passes
     to an interrupt service routine which then passes control to another
     thread to invoke the latter for execution during the next timeslice.
     Control is thereafter returned to the preempted thread to enable the
     latter to resume execution at the point where it was previously
     interrupted. Control of the processor is thus transferred repeatedly
     back and forth between the threads so rapidly that the threads are
  run
     substantially simultaneously. The threads may thus execute
     incrementally and piecewise with their successive task portions
     executed alternately in a mutually interleaved relation and with each
     thread executed during its respective series of spaced timeslices
     interleaved with the timeslices of at least one other thread.
     
                          36 Claims, 9 Drawing Figures
  
                      ========================================
  
  
  Greg Aharonian
  Internet Patent News Service